In a conventional flip-flop layout, an active region of a latch circuit and an active region of an inverter are continuously arranged, and gate electrodes to which a same signal is inputted are connected to one another by extending polycrystalline silicon. In order to avoid the polycrystalline silicon used for the extension described above, irregularities are produced on a layout in the active region of the flip-flop, and variation in characteristic due to a semiconductor manufacturing process is caused with microfabrication of a transistor.
The irregularities on the layout of the active region generate stress caused by the active region and the polycrystalline silicon arranged thereon, which causes a variation in timing in delay, set-up, and hold of the flip-flop.